Akira NAGOYA

Biography

He joined the NTT Electrical Communication Laboratories in 1980.
From 1980 to 1987, he was engaged in research and development of DIPS-11/5E series mainframe CPU architecture.
From 1989 to 2006, he was engaged in research of the CAD system (see also PARTHENON) for ASIC design and reconfigurable computing systems.
From 1990 to 1991, he was a visiting scholar at Department of Computer Science, University of Illinois at Urbana-Champaign (UIUC).

From 2006 to 2021, he was engaged in education and research as a professor of the following organizations at Okayama University in Japan.

• Department of Computer Science, Division of Industrial Innovation Sciences (Doctor's Course), Graduate School of Natural Science and Technology
  
• Department of Computer Science, Division of Electronic and Information Systems Engineering (Master's Course), Graduate School of Natural Science and Technology
  
• Department of Information Technology, Faculty of Engineering
  

Research Interests

• Reconfigurable Computing
• Computer Architecture
• VLSI Design
• Electronic Design Automation

Awards

• Technology Prize from Okochi Memorial Foundation, Mar. 1992.
• Invention Award from the President of NTT, Oct. 1992.
• Achievement Award from IEICE, May 2000.
• IEEE Computer Society, ASYNC-01 Best Paper Finalist, Mar. 2001.
• IEEE CAS Society, CAD Transactions Best Paper Award, May 2001.

Professional Activities

• Part-time Instructor, Dept. of Information Engineering, Mie University, 1993-1995.
• Part-time Instructor, School of Engineering Science, Osaka University, 2001-2002.
• Part-time Instructor, Dept. of Information Technology, Okayama University, 2004-2005.
• Member of IEEE Kansai Section Membership Development Committee, 1999-2000.
• Vice-chair of IEICE CPSY (Computer Systems) Technical Group, 1997-1999.
• Committee Member of IEICE CPSY (Computer Systems) Technical Group, 1999-2004.
• Vice-chair of IEICE RECONF (Reconfigurable Systems) Technical Group, 2003-2009.
• Chair of IEICE RECONF (Reconfigurable Systems) Technical Group, 2009-2011.
• Member of IEICE RECONF (Reconfigurable Systems) Technical Group, 2011-2017.
• Advisor of IEICE RECONF (Reconfigurable Systems) Technical Group, 2017-present.
• Member of IEICE RIS (Renewable Integrated System) Technical Group, 2010-2013, 2015-2017.
• Vice-chair of IEICE RIS (Renewable Integrated System) Technical Group, 2013-2015.
• Member of IEICE SUSC (Sustainable Computing) Technical Group, 2018-present.
• Editorial Committee Member of IEICE Transactions on Information and Systems, 2003, 2007, 2011, 2013, 2014, 2017.
• Associate Editor of IEICE Transactions on Information and Systems, 2004.
• Editorial Committee Member of IEICE Transactions on Information and Systems (Japanese Edition), 2005, 2009.
• Member of JEIDA Technical Committee for Computer Systems, 1985-1987.
• Planning Committee Member of CG Osaka / Network Kansai Symposium, 1993-1998.
• Executive Committee Member of ASIC Design Contest, 1996-2021.
• Organizing Committee Member of PARTHENON Technical Society, 1997-2004.
• Director & Steering Committee Member of PARTHENON Society, 2004-2021.
• Steering Committee Chair of PARTHENON Society, 2008-2021.
• Vice Chief Director of PARTHENON Society, 2022-present.
• Steering Committee Member of SASIMI, 1997-2006.
• Presentation Chair of SASIMI 2000, 2001, Technical Program Committee Member of SASIMI 2003.
• Technical Program Committee Member of ASP-DAC '95, ASP-DAC '97, ASP-DAC '98, ASP-DAC 2000.
• Program Committee Member of JSPP '99.
• Program Committee Member of CIT 2007, 2008, 2009.
• Program Committee Member of SUSCW '18, SUSCW '19.
• Advisory Committee Member of FPT 2018.
• Executive Committee Member of FIT 2019.

Publications